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n2206hkim no. a0483-1/13 stk621-041, STK621-041A-E overview the stk621-041 and STK621-041A-E are stk621-000 series pr oducts that use a miniature sip package. these three- phase motor driver hybrid ics integrate the power main circuit bl ock and peripheral circuits needed for inverter control into a single package. the upper-side control power supply can be provided by a bootstrap circuit, making it possible to configure the control power supply with a single power supply (vd4 = 15v). this device also has a built-in high voltage- level shifter circuit for upper-side device drive signal transmission, and six input signals can be input from the same voltage potential (v ss ) as the control circuit. this enables direct connec tion from a control circuit such as a microcontroller without using a photo coupler or other insulating circuit. a basic system configuration example is shown on page 2 (figure: inverter system configuration example). applications ? air conditioner three-phase compressor motor driver. features ? integrates the igbt, frd, pre- driver and protection circuits. ? built-in thermal protection, overcurrent protection (bus line) and pre-driver supply under voltage protection. ? allows cmos-level input of control signals without an insulating circuit. ? use of an upper-side power supply bootstrap circuit (externally set) enables single power supply drive. ? built-in circuit for preventing short circuits when both upper and lower inputs are on at the same time. this prevents arm short circuits due to si multaneous upper and lower phase on inputs. (a dead time is needed to prevent sh ort circuits due to switching delay.) ? transfer full mold structure sip. (single inline package.) ? integrates the three-phase power main circuit, pre-driver circuit, protectio n circuit and level shifter circuit needed for the inverter control circuit. ? igbt and frd used for the power main circuit devices. ? built-in device protection circuits include an overcurrent pr otection circuit that detects and protects against minus bus line currents with an internal shunt resistor, an thermal prot ection circuit, and a control supply under voltage protection circuit. these circuits cut off the gates inside the ic and output an error signal (fault) when an abnormality occurs. ordering number : en*a0483 thick-film hybrid ic air conditioner three-phase compressor motor driver imst inverter power hybrid ic any and all sanyo semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo semiconductor representative nearest you before usingany sanyo semiconductor products described or contained herein in such applications. sanyo semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated val ues (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor products described or contained herein.
stk621-041,621-041a-e no. a0483-2/13 ? built-in level shifter circuit allows cmos-level input of upper-side device control signals from the same voltage potential as the lower-side device control signals. this enable s direct input of six signals from the control circuit. ? the upper-side pre-driver circuit has reduced power consumption, so the upper-side control power supply can be configured using a bootstrap circuit (cb, di). this makes it possible to configure the external control power supply using only a single lower-side power supply. ? compact, easy-to-mount single inline (sip) package. ? analog signal output pin detects the minus bus line current with a shunt resistor. figure inverter system configuration specifications maximum ratings at tc = 25 c parameter symbol conditions ratings unit supply voltage v cc + to - pins, surge < 500v *1 450 v collector-to-emitter voltage v ce + to u (v, w) or u (v, w) to - 600 v output current i o +, -, u, v, w pin current 20 a output peak current iop +, -, u, v, w pin current pw=100 s 25 a control supply voltage vd1, 2, 3, 4 vb1 - u, vb2 - v, vb3 - w, and v dd ? v ss *2 20 v input signal voltage v in hin1, 2, 3, lin1, 2, 3 pins 0 to 7 v fault pin voltage vfault fault pin 20 v maximum power dissipation pd igbt, per 1 channel 34 w junction temperature tj igbt, frd junction temperature 150 c storage temperature tstg -40 to+125 c operating temperature tc hic case temperature -20 to +100 c tightening torque mt a screw portion *3 1.17 n ? m insulation breakdown voltage vis sine wave 50hz ac 1min 2000 vrms unless otherwise specified, the volta ge reference for - pins is the v ss pin voltage. *1 surge voltage generated by switching operation due to the effects of wiring inductance between + and -. *2 vd1 = voltage between vb1 and u; vd2 = voltage between vb2 and v; vd3 = voltage between vb3 and w; vd4 = voltage between v dd and v ss *3 heat sink plate-mounting flatness: 0.25mm or less *4 test conditions: ac 2500v for 1second ac stk621-041, STK621-041A-E m power supply for control control signal control block 5v power supply
stk621-041,621-041a-e no. a0483-3/13 electrical characteristics at tc=25 c, vd=15v parameters symbols conditions min typ max unit test circuit power output block collector-to-emitter cut-off current i ce v ce =600v 2.0 ma fig.1 upper side 1.6 2.2 collector-to-emitter saturation voltage v ce (sat) i o =10a lower side 1.8 2.4 v fig.2 upper side 1.7 2.3 diode forward voltage v f i o =-10a lower side 1.9 2.5 v fig.3 rthj-c(t) igbt 3.0 junction-to-substrate thermal resistance rthj-c(d) fwd 3.6 c/w control (pre-driver) block vd1, 2, 3=15v 0.05 control circuit current dissipation i d vd4=15v 10 ma fig.4 on input signal voltage v ih output on 0.8 v off input signal voltage v il output off 2.2 v protection block thermal protection temperature tsd substrate surface 100 120 c overcurrent protection current isd p.w.=100 s 28 40 a fig.5 control supply under voltage protection uvlo 9 12 v fault pin intake current iosd when fault operating (low), vfault=1v 2 ma ton 1.0 switching time toff i o =10a, inductive load 1.2 s fig.6 current output signal level iso i o =10a 0.167 v unless otherwise specified, the volta ge reference for - pins is the v ss pin voltage. notes 1. the on input signal voltage prescribes the input signal voltage at which the output stage igbt turns on, and the off input signal voltage prescribes the input signal voltage at which the output stage igbt turns off. apply a voltage between 0 and v ih (max) when output is on, and a voltage between v il (min) and v dd when output is off. 2. after the internal protection circuit operates and the fault signal (low = fault on: open drain output) goes on, the latch status continues as long as any of the six inpu t signals is on (low). the latch status is reset after all six input signals are off (high) continuously for approximately 10 s. however, control supply under voltage protection (uvlo) operation is as follows. upper arm the fault signal is not output, but the corresponding gate signal turns off. note that even if the voltage recovers to normal, the latch status continues while the input signal is on (low). lower arm the gate signal goes off and fault signal is output. however, unlike protection operation for the upper arm, operation returns to normal when the voltage recovers to normal. (protection operation is not latched by the input signal.) 3. when using m4 screws to mount the ic to a heat sink plate, apply a tightening torque of 0.79 to 1.17 n ? m. the heat sink plate-mounting flatness should be 0.25mm or less. 4. the control supply voltage-drop protection function protects the devices when the control supply voltage drops due to some abnormality during operation. control supply voltage drop at the start of operation and other cases should be confirmed in the set-mounted condition.
stk621-041,621-041a-e no. a0483-4/13 package dimensions unit:mm (typ) [stk621-041] package dimensions unit:mm (typ) [STK621-041A-E] 122 3.5 10.5 70.0 78.0(hic part) 6.0 2.0 2.0 2.54 0.75 21 2.54=53.34 58.0 31.1 4.6 16.0 2.5 0.5 0.5 r2.3 22 1 70.0 7.0 6.0 1.5 3.5 3.5 5.0 5.0 10.0 31.1 (10.5) 10.0 3.0 16.0 4.6 22.0 4.5 0.5 5.0 2.54 0.75 1.5 74.0 64.0 78.0 82.0 13.0 9.0 18.5 21 2.54=53.34 1.5 2.7
stk621-041,621-041a-e no. a0483-5/13 test circuit (measured phase u+: upper u phase, u-: lower u phase) 1: ice measured phase u+ v+ w+ u- v- w- m 10 10 10 2 5 8 n 2 5 8 12 12 12 2: vce (sat) (pulse measurement) measured phase u+ v+ w+ u- v- w- m 10 10 10 2 5 8 n 2 5 8 12 12 12 m 13 14 15 16 17 18 3: vf (pulse measurement) measured phase u+ v+ w+ u- v- w- m 10 10 10 2 5 8 n 2 5 8 12 12 12 4: id measured phase vd1 vd2 vd3 vd4 m 1 4 7 21 n 2 5 8 22 vd1=15v vd2=15v vd3=15v vd4=15v 1 2 4 5 7 8 21 22 v ce i ce m a n vd1=15v vd2=15v vd3=15v vd4=15v 1 2 4 5 7 8 21 22 i o v ce (sat) m v n m i o v f v m n v m n vd* i d
stk621-041,621-041a-e no. a0483-6/13 5: isd 6: switching time (lower figure shows typical example of lower u phase.) vd1=15v vd2=15v vd3=15v vd4=15v 1 2 4 5 7 8 21 22 i o 12 2 16 input signal input signal i o isd 100 s input signal (0 to 5v) i o 10% 90% t on t off vd1=15v vd2=15v vd3=15v vd4=15v 1 2 4 5 7 8 21 22 v cc 12 10 16 input signal 2 i o cs
stk621-041,621-041a-e no. a0483-7/13 block diagram and pin description numbers in parentheses indicate the pin numbers. (1) + and - pins (main circuit power supply input pins) these pins are connected to the main dc power supply. voltage up to v cc can be applied. spike voltage may be generated during switching operation and result in overvoltage due to the effects of the floating inductance of the connection wiring. therefore, use a short wiring length to reduce the wiring inductance, and take measures to suppress surge voltage and voltage fluctuation such as connecting a snubber circuit for absorbing voltage surges as close as possible between the + and - pins. (2) u, v and w pins these output pins are connected to the th ree-phase motor. note that these pins have the same voltage potential as the minus-side reference voltage potential of each upper-side control power supply, and are connected to the minus pins of the capacitors for each upper-side c ontrol power supply. therefore, connect the capacitors as close to these pins as possible. (3) v dd and v ss pins these connect the pre-dr iver circuits for the lower-side power devices with the internal protection circuits and the external control power supplies for the logic circuits. the voltage over this section is monitored by the undervoltage protection circuit. (operation stops when the voltage is insufficient.) in addition, the v ss pin is the reference voltage potential for the control input signals, the fault signal and the iso signal. note that the v ss pin is connected internally with the minus (-) pins. (the main circuit current cannot be taken from the v ss pin.) ? latch ? ? ?
stk621-041,621-041a-e no. a0483-8/13 (4) vb1, vb2 and vb3 pins these pins connect the positive power supplies for the upper-side power device pre-driver circuits. the three control power supplies each require an electrically insu lated floating power supply. in addition to the method that uses three independent power supplies, this power supply can also be conf igured using the bootstrap circuit shown in fig. 3. as shown in this figure, cb has a path (1) that is charged when the lower-side device is on, and a path (2) for motor regeneration mode. the cb section vo ltage fluctuates according to the switching frequency and duty ratio of the external control circuit. therefore, the cb capacitance value must be set in consideration of the voltage fluctuation. db should use a high-speed type frd with a fast t rr and vr = 600v. rb is used to limit the rush charging current during cb initial charging. note that a large rush charging current may cause the internal circuits to malfunction. cb can also be charged before startup by connecting high-value resistors to the output pins and minus pins. (care must be taken for the withstand voltage and the power.) the upper-side control power supply voltage is monitored by the under voltage protection circuit, and the respective phase output stops when the voltage is insufficient.) (5) input (hin1, hin2, hin3, lin1, lin2, lin3) pins fig. 4 shows the input pin internal circuit. in the input block, the v dd pin is pulled up internally by a 50k ? resistor. the input signal is low active, and output is on at a voltage of v ih (max) or less, and off at a voltage of v il (min) or more. this allows direct input to the input pin from a 5v control circuit. when using direct connection from the control circuit, the connection block on the control circuit side is pulled up by a 50k ? resistor, so the voltage potential may be higher than 5v. in cases when this voltage may exceed the withstand voltage of the connection block, an effective measure is to connect an external resistor of several k ? between the external 5v power supply and the input pin. note that this external resistor also effectively absorbs input pin noise when the pin is susceptible to noise in an actual set. hin1, hin2 and hin3 are the inputs for the u, v and w upper-side power devices, and lin1, lin2 and lin3 are the inputs for the lower-side power devices. an anti-simultaneous on circuit is built-in to prevent arm short-circuits when both th e upper and lower inputs for each phase are on at the same time. however, a dead time must always be provided between signals to prevent arm short-circuits due to the power device switching response delay. (6) fault pin the fault pin is an open drain output as shown in fig. 5. when protection operation starts, the mosfet turns on and the fault pin goes low. at this time, the intake current iosd is 2ma (at voltage of 1v). this should be taken into account when connecting an external circuit. when pulling up the pin with a resistor, connect 5.6k ? or more. the protection circuits that operate the fault pin are the overcurrent protection circuit and the lower-side drive supply voltage (v dd - v ss ) under-voltage protection circuit. the fault pin does not operate during upper-side power supply under-voltage protection. all power devices are off while the fault pin is low. fault is latched when any of the inputs ar e on (except vduv), and is reset by turning all six inputs off. driver cb db v dd (1) (2) stk621-041,041a-e driver v dd in v ss 50k ? v dd fault v ss figure 3 bootstrap circuit and charge path figure 4 input circuit block figure 5 fault output block
stk621-041,621-041a-e no. a0483-9/13 (7) iso pin this is the current monitor pin. this pin outputs the positive direction current flowing to the shunt resistor inserted into the - (minus) pin line as a voltage signal. (negative direction current is not output.) note that overcurrent protection is disabled when this pin is shorted with v ss . when connecting an external circuit to this pin, the external circuit impedance should be 5.6k ? or more. protection circuits the stk621-041 and STK621-041A-E have th e following built-in protection functions. (1) thermal protection (tsd) when the hic internal board temperature rises to the se t temperature or higher, the thermal protection circuit operates to cut off all six device outputs and latch the f ault pin low. the tsd temperature is prescribed by the heat sink board temperature when the fault pin inverts in the condition with the hic externally warmed. (2) overcurrent protection (isd) this function detects the bus line current using a shunt resistor provided on the minus pin side. when the set current is exceeded, all six device outputs are cut off and the fault pin is latched low. a dead zone is provided so that the circuit does not respond to pulse currents with a width less than several s in order to prevent malfunction due to the diode recovery current or noise. therefore, note that the overcurrent protection circuit may not operate when large pulse currents shorter than that width flow repeatedly. (3) v dd under voltage protection (vduv) when v dd drops below the prescribed voltage (10.5v, typ.), all six device outputs are cut off and the fault pin is latched low. operation returns to normal when the voltage recovers. (4) vbs under voltage protection (vbsuv) when the upper-side control supply voltage vbs drops below the prescribed voltage (10.5v, typ.), the output of that channel is cut off and the channel is latched until the corresponding input signal goes off. (the channel is automatically reset when the input signal goes off.) (5) arm short circuit input protection function when the upper and lower channel on signals are input at the same time, this status is judged by the internal logic circuit and both gate signal outputs are turned off to prev ent an arm short circuit. operation returns to normal when either of the signals goes off. (6) latch reset the latch states established by (2) and (3) above are canceled when all six inputs are off (10 s or more).
stk621-041,621-041a-e no. a0483-10/13 application circuit example a typical application circuit is shown below. the stk621-041 and STK621-041A-E can configure the pre-driver power supply with a single power supply. in addition, the control signals can be input directly from the c ontrol circuit (microcontroller or other 5v system circuit). note that the pre-driver power supply can also use a conventional four power s upply configuration, so the appropriate configuration can be selected according to the applied set. figure 6 sample application circuit (when power/control signal are directly supplied) recommended operating conditions parameters symbol conditions min typ max unit supply voltage v cc + to - pins 0 280 400 v vd1, 2, 3 vb1-u, vb2-v, vb3-w 12.5 15 17.5 control supply voltage vd4 v dd -v ss *1 13.5 15 16.5 v on input signal voltage v in (on) hin1, hin2, hin3, lin1, li n2, lin3 pins 0 1 v off input signal voltage v in (off) 4 5 v dd v pwm frequency fpwm 1 10 khz dead time dt upper/lower phase input signal downtime 2 s tightening torque ?m4? type screw 0.79 1.17 n ? m *1 control power supply (vd4=151.5v) must have the capacity of i o =20ma(dc) and 0.5a (peak). control logic v dd =15v vb1 u vb2 v vb3 w + - hin1 hin2 hin3 lin1 lin2 lin3 fault iso v dd v ss + - v cc cb cb cb db db db rb cs ci cd 1 2 4 5 7 8 10 12 13 14 15 16 17 18 19 20 21 22 m
stk621-041,621-041a-e no. a0483-11/13 precautions 1. the control power supply can be driven by a single power supply by connecting a bootstrap diode: db (use a high- speed diode with a short t rr and a withstand voltage of 600v or more) and a capacitor: cb (approximately 1 to 47 f). in this case, cb is charged by setting the lower-side device to on (low output). note that a large charging current flows during startup and in other cases when the cb voltage is low, and may cause adverse effects such as noise. be sure to connect a limiting resistor: rb (approximately several ? to several tens of ? ). (when not using the bootstrap method, each upper-side control power supply should be externally supplied by an independent power supply.) in addition, the upper-side control voltage may be insufficient depending on the control signal input status, so this should be checked. 2. fluctuating spike voltage may be generated during switching operation due to the effects of the floating inductance of the + and - pin power supply external wiring or other factor s. therefore, use a short wiri ng length (between ci and each pin) to reduce the wiring inductance, and take measures to suppress surge voltage such as connecting a snubber circuit (capacitor: cs, approximately 0.1 to 10f) for abso rbing voltage surges as close as possible between the + and - pins. 3. the iso pin (pin 20) is the current monitor pin. note that overcurrent protection is disabled when the iso pin and the v ss pin are shorted. 4. the fault pin is an open drain output (fault operation when low). when pulling up the fault pin, use 5.6k ? or more. 5. a 5v (5.0 to 5.4v) zener diode is connected inside the signal input pins. when inputting voltage in excess of 5v, connect a resistor between the power supply side and the signa l input pin so that the input current to the signal input pin is 0.5ma or less. this resistor is also effective for absorbing noise. 6. the overcurrent protection function is valid only when circuit control can be performed normally. be sure to provide a fuse in the v cc line or otherwise ensure safety in the set design. 7. the ic may become damaged or rupture if the motor connection pins (pins 2, 5 and 8) are open during motor rotation. take special care for the connections (soldered condition) of these pins.
stk621-041,621-041a-e no. a0483-12/13 stk621-041, 041a-e logical timing chart * the ??-?? line current shows only the short circuit current in order to explain overcurrent protection operation. notes 1. (1) is the timing chart when the anti-simultaneous on circuit in the signal input block has operated. (note that a dead time must be externally set to prevent a short circuit due to switching delay.) 2. when the lower phase v dd is insufficient, all gate output signals is set to off and the fault output is set low. however, unlike the upper phase protecti on operation, the latch state is cancel ed and the fault output is set high approximately 10 s after the voltage recovers to normal and all six phase inputs go off. (2) 3. when the upper phases vb1, vb2 and vb3 are insufficient (3), only the upper phase outputs of the corresponding phases are set to off, and fault output is not performed. however, the output off latch status continues while the input signals are on. after vb1, vb2 and vb3 recover, the outputs are returned to operating status by re- inputting the signals to the upper phases. 4. overcurrent protection operation is as follows. (this descri bes the case when a load short circuit occurs only during the gray portion (4).) when an overcurrent flows, the hic internal overcurrent prot ection circuit operates and performs control to set the igbt for all phases to off. in addition, the fault output is also set low at this time. after protection operation ends, the latch status is cancel ed and the fault output is set high approximately 10 s after all six inputs go off. under voltage protection reset voltage hin1, 2, 3 off off on on lin1, 2, 3 v dd vb1, 2, 3 uvw (upper) uvw (lower) * "-" line current (+ - forward) fault about 10 s about 10 s itf02447 (1) (2) (3) (4) (1)
stk621-041,621-041a-e no. a0483-13/13 ps this catalog provides information as of november, 2006. specifications and information herein are subject to change without notice. specifications of any and all sanyo semiconductor pr oducts described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. to verify s ymptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. sanyo semiconductor co., ltd. strives to supply high- quality high-reliability products. however, any and all semiconductor products fail with some probabi lity. it is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property . when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any or all sanyo semiconductor produc ts (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording , or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo semiconductor co., ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equipment, refer to the "delivery specification" for the sanyo semiconductor product that you intend to use. information (including circuit diagrams and circui t parameters) herein is for example only; it is not guaranteed for volume production. sanyo semicondu ctor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. 0.6 0.1 0 020 51015 25 30 iso - i o output current, i o - a current output signal level, iso - v itf02448 0.3 0.5 0.4 0.2 t c = 1 0 0 c 2 5 c 100 5 1.0 3 2 050 30 10 20 60 40 70 100 80 90 pw - isd over-current protection current, isd - a current pulse width, pw - s itf02449 10 7 5 3 2 7 t c = 10 0 c 2 5 c v d =15v 0.1 0.1 57 3 2 1.0 57 3 2 10 57 3 2 100 v ce (sat) - i o output current, i o - a collector-to-emitter saturation voltage, v ce (sat) - v itf02450 1.0 3 5 7 2 10 3 5 7 2 t c= 100 c 2 5 c 100 10 5 0.1 3 2 0 2.0 0.5 1.0 2.5 1.5 4.0 3.0 3.5 i o - v f diode forward voltage, v f - v output current, i o - a itf02451 1.0 7 5 3 2 7 5 3 2 7 t c = 2 5 c 1 0 0 c v d =15v v d =15v

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